Spectrum Signal Processing by Vecima

Overview

The XMC-3321 is a key component in Spectrum’s series of software defined digital radio modules from the flexComm™ wireless communications product line. The XMC-3321 supports industry standard IF frequencies including 10.7, 21.4 and 70 MHz through the use of dual 14-bit A/D converters sampling at up to 105 MSPS and dual 14-bit D/A converters sampling at up to 300 MSPS in a single-width XMC form factor. The XMC (ANSI VITA 42.0) standard is fully compatible with the IEEE P1386.1 PMC standard but offers the additional benefit of dedicated high-speed links between an XMC-compliant carrier and its mezzanine modules. The XMC-3321 is capable of supporting either the Solano Communication Technology or Parallel RapidIO (ANSI VITA 42.1) via the high-speed XMC interface. The module also features a single user programmable Xilinx Virtex-4 FPGA device for wide bandwidth signal processing and filtering in the digital domain.

Features

• Available in conduction-cooled and air-cooled versions with (optional) conformal coating. Rugged conduction-cooled PMC module versions follow the industry standard ANSI VITA 20 specification and operate with IEEE 1101.2 compliant XMC carriers.
• IF to digital conversion via two 14-bit A/D converters sampling at 96.0 MSPS (alternate sampling rates from 36
  to 105 MSPS optional)
• Digital to IF conversion via two 14-bit D/A converters sampling at 192.0 MSPS (alternate sampling rates up to
  300 MSPS optional)
• Two 12 bit D/A converters up to 100 KSPS suitable for driving AGC input of an RF front-end
• Four 12 bit A/D converters up to 100 KSPS suitable for reading the RSSI output of an RF front-end
• XMC interface (ANSI VITA 42.0) provides high-speed, low latency, deterministic data flow to an industry standard carrier. Compatible with PMC and ePMC (Solano®) carriers.
• User programmable Xilinx® Virtex-4™ FPGA for wideband processing and low power consumption
• PCI 32-bit/33 MHz host bus for control
• High-speed analog inputs are AC coupled, DC coupled input is optional
• JTAG interface compatible with Xilinx’s ChipScope™ debugger
• General Purpose I/O (GPIO) lines via PN4 connect the user programmable FPGA to the carrier board
• Internal or external 10 MHz reference oscillator drives the on-board sample clock
• Extended GPIO version available, replacing low-speed A/D and D/A converters with additional JN4 GPIO

Benefits

• Rugged design for deployment in harsh environments
• Supports conversion and processing of intermediate frequency (IF) signals including industry standard 10.7, 21.4 and 70 MHz
• Supports multi-channel coherent operation necessary in many Multiple-Input, Multiple-Output (MIMO) and Smart Antenna applications
• Increase communications range and improve payload data throughput with ultra low additive jitter clock circuitry design that is essential to maximize energy per bit/noise spectral density (Eb/No)
• Provides independent data and control signal paths necessary for real-time transceiver operation
• quicComm™ software architecture accelerates application development, simplifies the programming model and
  ensures code portability