HCDR-1002 Integrated Development System
VME-based High Channel Density Transceiver with FPGA-based Channelization
The HCDR-1002 IDS is a complete, integrated hardware and software solution for the
development of wireless receiver applications that require a wide range of output bandwidths
and dynamic re-configurability.
The HCDR-1002 IDS was designed specifically for wireless applications. It is an extremely
flexible platform, both in its modularity and in its deployment of reconfigurable Xilinx Virtex
FPGAs for wideband and narrowband channelization. Post-channelization processing is handled
by Motorola PowerPC MPC7410 AltiVec processors that offer exceptional floating-point
performance to support a wide variety of wireless applications,
including array antenna applications. The Solano Communications
IC binds the signal processing platform together with high-speed,
low latency, deterministic data paths between the processing
elements. The signal processing platform is integrated into a
rack-mount chassis with a single-board computer which serves
as the development and run-time host. All relevant software is
loaded on to the single-board computer’s
hard drive, and the system is fully tested
prior to shipment, which ensures that
application developers are running their
first examples right after power-up.
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