VME SharcPAC Motherboard


The Melbourne VME SharcPAC Motherboard has been designed to allow the integration of high performance digital signal processing systems into a standard VME environment. Using the Analog Devices SHARC processor in a distributed memory parallel
architecture, the system can integrate the following in a single 6U VME slot:

  • High performance VME-64 Master/S lave interface
  • Up to l8 SHARC processors (when populated with Octal SharcPACs)
  • Up to 64 MBytes of DRAM (when populated with DRAM SharcPACs, giving a total of four SHARCs)
  • Up to l8 Mbytes of zero-wait-state SRAM (when populated with dual SRAM SharcPACs, giving a total of six SHARCs)
  • Numerous high-bandwidth I/O options using application-specifìc SharcPACs.
Features and Benefits

The Melbourne is in the form of a standard 6U x 160mm VME board, with I or 2 ADSP-
2106x processors on-board and 2 SharcPAC module sites. Other features include:

  • Each on-board SHARC is optionally provided with 128K or 512K by 48 bits of zero-wait-state SRAM, and/or lM or 4M by 32 bits of fast page-mode DRAM.
  • VME slave capability with VMEbus and local interrupts. The VME interface is restricted to one of the on-board SHARCs (SHARC 0) and it’s local memory.
  • VME master capability. SHARC 0 can access any VME address in any mode. The board can operate as the slot 1 controller of the VME bus.
  • SHARC 0 can boot from a 256K by 8 bit flash ROM, from a VME host, or fromanother SHARC board via a link port. All other SHARCs and SharcPACs boot over links attached to SHARC 0.
  • RS-232 interface for a debug terminal. This interface is accessible from SHARC 0.

The processors and SharcPACs are interconnected with the SHARC link ports. The network topology is highly flexible, since a total of l8 links are available off-board. The user can connect these link ports using impedance matched cables. A high level of connectivity between processors can be achieved, and the network can be expanded to
multiple boards.

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